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24C128 ( EEPROM 16Kx8 (128Kbit ) )

35.00 EGP

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24C128P 24C128 Serial CMOS EEPROM 128K Bit 16Kx8 Serial CMOS EEPROM Memory IC DIP-8 Package I2C Bus IC

The 24C128 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common Two-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP (24C128), 8-lead TSSOP, 8-lead SOIC Array Package and 8-ball dBGA2 packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.

24C128 Pin Configuration

PIN NO PIN NAME DESCRIPTION
1 A0 User Configurable Chip Select
2 A1 User Configurable Chip Select
3 A2 User Configurable Chip Select
4 GND Ground Pin
5 SDA Serial Data Pin
6 SCL Serial Clock Pin
7 WP Write Protect Pin
8 VCC Power Supply Pin

24C128 Key Features

  • Low-voltage and Standard-voltage Operation
    • 2.7 (VCC = 2.7V to 5.5V)
    • 1.8 (VCC = 1.8V to 3.6V)
  • Internally Organized 16,384 x 8 and 32,768 x 8
  • Two-wire Serial Interface
  • Schmitt Trigger, Filtered Inputs for Noise Suppression
  • Bidirectional Data Transfer Protocol
  • 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
  • Write Protect Pin for Hardware and Software Data Protection
  • 64-byte Page Write Mode (Partial Page Writes Allowed)
  • Self-timed Write Cycle (5 ms Max)
  • High Reliability
    • Endurance: One Million Write Cycles
    • Data Retention: 40 Years
  • Extended Temperature and Lead-free/Halogen-free Devices Available

Specification:-

  • • Low-voltage and Standard-voltage Operation – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 3.6V)
  • • Internally Organized 16,384 x 8 and 32,768 x 8
  • • Two-wire Serial Interface
  • • Schmitt Trigger, Filtered Inputs for Noise Suppression
  • • Bidirectional Data Transfer Protocol
  • • 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
  • • Write Protect Pin for Hardware and Software Data Protection
  • • 64-byte Page Write Mode (Partial Page Writes Allowed) • Self-timed Write Cycle (5 ms Max)
  • • High Reliability – Endurance: One Million Write Cycles – Data Retention: 40 Years
  • • Extended Temperature and Lead-free/Halogen-free Devices Available
  • • 8-lead JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, 8-lead SAP and 8-ball dBGA2 Packages
  • • Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers

Package Include:

  • 1 x 24C128 Serial CMOS EEPROM
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